LT1970500mA Power Op Amp withAdjustable Precision Current LimitFEATURES■■■■■■DESCRIPTIO■■■■■■±500mA Minimum Output CurrentIndependent Adjustment of Source andSink Current Limits2% Current Limit AccuracyOperates with Single or Split SuppliesShutdown/Enable Control InputOpen Collector Status Flags:Sink Current LimitSource Current LimitThermal ShutdownFail Safe Current Limit and Thermal Shutdown1.6V/µs Slew Rate3.6MHz Gain Bandwidth ProductFast Current Limit Response: 2MHz BandwidthSpecified Temperature Range: –40°C to 85°CAvailable in a 20-Lead TSSOP PackageThe LT®1970 is a ±500mA power op amp with preciseexternally controlled current limiting. Separate controlvoltages program the sourcing and sinking current limitsense thresholds with 2% accuracy. Output current maybe boosted by adding external power transistors.The circuit operates with single or split power supplies from5V to 36V total supply voltage. In normal operation, theinput stage supplies and the output stage supplies are con-nected (VCC to V+ and VEE to V–). To reduce power dissi-pation it is possible to power the output stage (V+, V–) fromindependent, lower voltage rails. The amplifier is unity-gainstable with a 3.6MHz gain bandwidth product and slews at1.6V/µs. The current limit circuits operate with a 2MHz re-sponse between the VCSRC or VCSNK control inputs andthe amplifier output.Open collector status flags signal current limit circuitactivation, as well as thermal shutdown of the amplifier. Anenable logic input puts the amplifier into a low power, highimpedance output state when pulled low. Thermal shut-down and a ±800mA fixed current limit protect the chipunder fault conditions.The LT1970 is packaged in a 20-lead TSSOP package witha thermally conductive copper bottom plate to facilitateheat sinking.UAPPLICATIO S■■■■Automatic Test EquipmentLaboratory Power SuppliesMotor DriversThermoelectric Cooler Driver, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.TYPICAL APPLICATIOVLIMIT0V TO 5VVLIMIT10 • RCSAV = 2 Amplifier with Adjustable ±500mA Full-ScaleCurrent Limit and Fault Indication15V15V3kV+Current Limited Sinewave Into 10Ω LoadIOUT(LIMIT) = ±VCC+INVINISRCTSDLT1970OUTSENSE+SENSE–V––INVEECOMMONENVCSRCVCSNKISNK4VVLOAD2V0V–2VIOUTRCS1Ω1/4WR110kR210k1970 TA01LOAD–15VVCSRC = 4VVCSNK = 2VRCS = 1ΩU20µs/DIV1970 TA02U1970fb1
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LT1970
ABSOLUTE AXI U RATI GS(Note 1)UUWPACKAGE/ORDER I FOR ATIOTOP VIEWVEEV–Supply Voltage (VCC to VEE).................................... 36VPositive High Current Supply (V+).................. V– to VCCNegative High Current Supply(V–)...................VEE to V+Amplifier Output (OUT)..................................... V– to V+Current Sense Pins(SENSE+, SENSE–, FILTER).......................... V– to V+Logic Outputs (ISRC, ISNK, TSD)....... COMMON to VCCInput Voltage (–IN, +IN).......... VEE – 0.3V to VEE + 36VInput Current....................................................... 10mACurrent Control Inputs(VCSRC, VCSNK).............COMMON to COMMON + 7VEnable Logic Input.............................. COMMON to VCCCOMMON..................................................... VEE to VCCOutput Short-Circuit Duration......................... IndefiniteOperating Temperature Range (Note 2)..–40°C to 85°CSpecified Temperature Range (Note 3)...–40°C to 85°CMaximum Junction Temperature......................... 150°CStorage Temperature Range.................–65°C to 150°CLead Temperature (Soldering, 10 sec)..................300°CELECTRICAL CHARACTERISTICSSYMBOLVOSPARAMETERInput Offset VoltagePower Op Amp CharacteristicsThe ● denotes specifications which apply over the full operatingtemperature range, otherwise specifications are TA = 25°C. See Test Circuit for standard test conditions.CONDITIONSMINTYP2000°C < TA < 70°C–40°C < TA < 85°CInput Offset Voltage Drift (Note 4)IOSIBeninRINCINVCMCMRRPSRRInput Offset CurrentInput Bias CurrentInput Noise VoltageInput Noise Voltage DensityInput Noise Current DensityInput ResistanceInput CapacitanceInput Voltage RangeCommon Mode Rejection RatioPower Supply Rejection RatioVCM = 0VVCM = 0V0.1Hz to 10Hz1kHz1kHzCommon ModeDifferential ModePin 8 and Pin 9 to GroundTypicalGuaranteed by CMRR Test–12V < VCM < 12VVEE = V– = –5V, VCC = V+ = 3V to 30VVEE = V– = –5V, VCC = 30V, V+ = 2.5V to 30VVEE = V– = –3V to –30V, VCC = V+ = 5VVEE = –30V, V– = –2.5V to –30V, VCC = V+ = 5V●●●●●●●●●●●2
UWWW1234567892120VEE19V+18TSD17ISNKORDER PARTNUMBERLT1970CFELT1970IFEOUTSENSE+FILTERSENSE–VCC–IN+IN–+16ISRC15ENABLE14COMMON13VCSRC12VCSNK11VEEVEE10FE PACKAGE20-LEAD PLASTIC TSSOPTJMAX = 150°C, θJA = 40°C/W (NOTE 8)EXPOSED PAD (PIN 21) IS CONNECTED TO VEEOrder Options Tape and Reel: Add #TRLead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBFLead Free Part Marking: http://www.linear.com/leadfree/Consult LTC Marketing for parts specified with wider operating temperature ranges.MAX6001000130010100UNITSµVµVµVµV/°CnAnAµVP-PnV/√HzpA/√HzkΩkΩpF–10–100–600–4–16031535001006–14.5–12.092901109011010510013010013013.612.0VVdBdBdBdBdB1970fb元器件交易网www.cecb2b.com
LT1970ELECTRICAL CHARACTERISTICSSYMBOLAVOLPARAMETERLarge-Signal Voltage GainThe ● denotes specifications which apply over the full operatingtemperature range, otherwise specifications are TA = 25°C. See Test Circuit for standard test conditions.CONDITIONSRL = 1k, –12.5V < VOUT < 12.5V●MIN100758040205TYP15012045MAXUNITSV/mVV/mVV/mVV/mVV/mVV/mVRL = 100Ω, –12.5V < VOUT < 12.5V●RL = 10Ω, –5V < VOUT < 5V, V+ = –V– = 8V●VOLOutput Sat Voltage LowVOL = VOUT – V– RL = 100, VCC = V+ = 15V, VEE = V– = –15V RL = 10, VCC = –VEE = 15V, V+ = –V– = 5VVOH = V+ – VOUT RL = 100, VCC = V+ = 15V, VEE = V– = –15V RL = 10, VCC = –VEE = 15V, V+ = –V– = 5VOutput Low, RSENSE = 0ΩOutput High, RSENSE = 0Ω–10V < VOUT < 10V, RL = 1kVOUT = 10VPEAK (Note 5)f = 10kHz0.01%, VOUT = 0V to 10V, AV = –1, RL = 1kVCSRC = VCSNK = 0V●1.90.81.71.0500–10000.7113.680.10.11545490480–1–500–500–500200–300–25250–250±0.1±0.05±0.01±0.05±0.01242050500500–0.2800–8001.62.5VVVVmAmAV/µskHzMHzµsVOHOutput Sat Voltage High●2.31200–500ISCSRFPBWGBWtSVSENSE(MIN)VSENSE(4%)VSENSE(10%)VSENSE(FS)IBIISENSE–IFILTERISENSE+Output Short-Circuit CurrentSlew RateFull Power BandwidthGain Bandwidth ProductSettling TimeMinimum Current Sense VoltageCurrent Sense Voltage 4% of Full ScaleCurrent Sense Voltage 10% of Full ScaleCurrent Sense Voltage 100% of Full ScaleCurrent Limit Control Input Bias CurrentSENSE– Input CurrentFILTER Input CurrentSENSE+ Input CurrentCurrent Sense Characteristics●71025555105200.1500500500300–20025mVmVmVmVmVmVµAnAnAnAµAµAµA%%%%%MHzVCSRC = VCSNK = 0.2VVCSRC = VCSNK = 0.5VVCSRC = VCSNK = 5V●●●VCSRC, VCSNK Pins0V < (VCSRC, VCSNK) < 5V0V < (VCSRC, VCSNK) < 5VVCSRC= VCSNK = 0VVCSRC = 5V, VCSNK = 0VVCSRC= 0V, VCSNK = 5VVCSRC = VCSNK = 5V●●●●●●●Current Sense Change with Output VoltageVCSRC = VCSNK = 5V, –12.5V < VOUT < 12.5VCurrent Sense Change with Supply VoltageVCSRC = VCSNK = 5V, 6V < (VCC, V+) < 18V2.5V < V+ < 18V, VCC = 18V–18V < (VEE, V–) < –2.5V–18V < V– < –2.5V, VEE = –18VCurrent Sense BandwidthRCSFResistance FILTER to SENSE–Logic Output Leakage ISRC, ISNK, TSDLogic Low Output LevelLogic Output Current LimitVENABLEIENABLEEnable Logic ThresholdEnable Pin Bias Current●●●750100012501ΩµAVmAVµA1970fbLogic I/O CharacteristicsV = 15VI = 5mA (Note 6)●●0.2250.8–11.90.42.513
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LT1970
ELECTRICAL CHARACTERISTICSSYMBOLISUPPLYICCICC(STBY)tONtOFFPARAMETERTotal Supply CurrentVCC Supply CurrentSupply Current DisabledTurn-On DelayTurn-Off DelayThe ● denotes specifications which apply over the full operatingtemperature range, otherwise specifications are TA = 25°C. See Test Circuit for standard test conditions.CONDITIONSVCC, V+ and V–, VEE ConnectedVCC, V+ and V–, VEE SeparateVCC, V+ and V–, VEE Connected, VENABLE ≤ 0.8V(Note 7)(Note 7)●●●MINTYP730.61010MAX1371.5UNITSmAmAmAµsµsNote 1: Stresses beyond those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. Exposure to any AbsoluteMaximum Rating condition for extended periods may affect devicereliability and lifetime.Note 2: The LT1970C is guaranteed functional over the operatingtemperature range of –40°C and 85°C.Note 3: The LT1970C is guaranteed to meet specified performance from0°C to 70°C. The LT1970C is designed, characterized and expected tomeet specified performance from –40°C to 85°C but is not tested or QAsampled at these temperatures. The LT1970I is guaranteed to meetspecified performance from –40°C to 85°C.Note 4: This parameter is not 100% tested.Note 5: Full power bandwidth is calculated from slew rate measurements:FPBW = SR/(2 • π • VP)Note 6: The logic low output level of pin TSD is guaranteed by correlatingthe output level of pin ISRC and pin ISNK over temperature.Note 7: Turn-on and turn-off delay are measured from VENABLE crossing1.6V to the OUT pin at 90% of normal output voltage.Note 8: Thermal resistance varies depending upon the amount of PC boardmetal attached to the device. If the maximum dissipation of the package isexceeded, the device will go into thermal shutdown and be protected.TYPICAL PERFOR A CE CHARACTERISTICS Warm-Up Drift VIO vs Time–100VOS • 1000 (50mV/DIV)TOTAL SUPPLY CURRENT (mA)INPUT BIAS CURRENT (nA)TIME (100ms/DIV)4
UW0V1970 G01Input Bias Current vs VCMVS = ±15V–120–140–160–180–200–220–240–260–15–12–9–6–303691215COMMON MODE INPUT VOLTAGE (V)1970 G02Total Supply Currentvs Supply Voltage14121086420–2–4–6–8–10–12–14ICC + IV+125°C25°C–55°CIEE + IV––IBIAS+IBIAS–55°C25°C125°C02468101214SUPPLY VOLTAGE (±V)16181970 G031970fb元器件交易网www.cecb2b.com
LT1970TYPICAL PERFOR A CE CHARACTERISTICS Supply Current vs Supply Voltage4.54.0SUPPLY CURRENT (mA)70IV+IV–OPEN-LOOP GAIN (dB)3.53.02.52.01.51.00.502TA = 25°CVCC = V+ = –VEE = –V–46810121416SUPPLY VOLTAGE (±V)IVEEIVCC403020100–10–2070605040302010PHASE MARGIN (DEG)Gain Bandwidth vs Supply Voltage5AV = 100104GAIN BANDWIDTH (MHz)VOLTAGE GAIN (dB)3–10VS = ±15VVS = ±5VVOLTAGE GAIN (dB)210048121620242832TOTAL SUPPLY VOLTAGE (V)Output Impedance100VS = ±15V600k100k10OUTPUT IMPEDANCE (Ω)SLEW RATE (V/µs)AV = 1001AV = 100.1AV = 1OUTPUT IMPEDANCE (Ω)0.010.0011k10k100k1MFREQUENCY (Hz)UW181870 G041970 G07Open-Loop Gain and Phasevs Frequency10090GAINPHASE80Phase Margin vs Supply Voltage605856PHASE MARGIN (DEG)6050AV = –1RF = RG = 1kTA = 25°CVOUT = VS/25452504846444240048121620242832TOTAL SUPPLY VOLTAGE (V)3620–301001k10k100k1MFREQUENCY (Hz)10M0100M1970 G051970 G06Gain vs Frequency10AV = 10Gain vs Frequency with CLOADVS = ±15VAV = 130nF10nF1nF–100nF–200–20–30–3036–4010k100k1MFREQUENCY (Hz)10M1970 G08–4010k1M100kFREQUENCY (Hz)10M1970 G09Disabled Output ImpedanceVS = ±15VVENABLE = 0.8V1.81.71.6Slew Rate vs Supply VoltageFALLINGRISING10k1k1001011k1.51.41.31.21.1AV = –1RF = RG = 1kTA = 25°C46121410SUPPLY VOLTAGE (±V)816181970 G1210M100M1970 G1010k100k1MFREQUENCY (Hz)10M100M1970 G111.01970fb5
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LT1970
TYPICAL PERFOR A CE CHARACTERISTICS Slew Rate vs Temperature2.5VS = ±15VFALLING2.0SLEW RATE (V/µs)RISING5V/DIV5V/DIV1.51.00.50–50–255025075TEMPERATURE (°C)Small-Signal Response, AV = 120mV/DIV20mV/DIVRL = 1k500ns/DIV% Overshoot vs CLOAD6050OUTPUT SWING (VP-P)AV = 1OVERSHOOT (%)VS = ±15V4030AV = –120100VSENSE (mV)10100CLOAD (pF)1k6
UW1001970 G13Large-Signal Response, AV = 1Large-Signal Response, AV = –110V10V0V0V–10V–10VRL = 1k12520µs/DIV1970 G14RL = 1kCL = 1000pF20µs/DIV1970 G15Small-Signal Response, AV = –1VOUT5V/DIV0VOutput OverdrivenVIN5V/DIV0V1970 G16RL = 1kCL = 1000pF2µs/DIV1970 G17VS = ±5VAV = 1200µs/DIV1970 G18Undistorted Output Swingvs Frequency30252015105VS = ±15VAV = –51% THD1k10kFREQUENCY (Hz)100k1970 G20Full Range Current SenseTransfer Curve5004003002001000–100–200–300–400–5000123451970 G21SOURCINGCURRENTSINKINGCURRENT10k1970 G190100VCSNK = VCSRC (V)1970fb元器件交易网www.cecb2b.com
LT1970TYPICAL PERFOR A CE CHARACTERISTICS Low Level Current SenseTransfer Curve2520SOURCINGCURRENTLOGIC OUTPUT VOLTAGE (V)1.01510VSENSE (mV)0.70.60.50.40.30.20.125°C125°COUTPUT CURRENT (mA)50–5–10–15–20–250255075100125150175200225250VCSNK = VCSRC (mV)1970 G22SINKINGCURRENTSafe Operating Area12001000IOUT AT 10% DUTY CYCLEOUTPUT STAGE CURRENT (mA)1086420–2–4–6–80051015202530SUPPLY VOLTAGE (V)3540–10IOUT PEAK (mA)800600400200Control Stage Quiescent Currentvs Supply Voltage543SUPPLY CURRENT (mA)210–1–2–3–4–502468101214SUPPLY VOLTAGE (±V)1618IEE–55°C25°C125°C125°C25°C–55°CTOTAL SUPPLY CURRENT, ICC + IV+ (µA)ICCUWLogic Output Levelvs Sink Current (Output Low)V+ = 15V0.9V– = –15V0.8Maximum Output Currentvs Temperature160014001200SOURCE1000800600400200SINKV+ = 15VV– = –15V–55°C00.0010.010.1110SINK CURRENT (mA)1001970 G230255075–75–50–250TEMPERATURE (°C)1001251970 G24Output Stage Quiescent Currentvs Supply VoltageIV+125°C25°C–55°CIV––55°C25°C125°C02468101214SUPPLY VOLTAGE (±V)16181970 G251970 G26Supply Current vs Supply Voltagein Shutdown800700600500400300200100002481012146SUPPLY VOLTAGE (V)1618VENABLE = 0V85°C25°C–55°C1970 G271970 G281970fb7
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LT1970
PI FU CTIO SVEE (Pins 1, 10, 11, 20, Package Base): Minus SupplyVoltage. VEE connects to the substrate of the integratedcircuit die, and therefore must always be the most negativevoltage applied to the part. Decouple VEE to ground with alow ESR capacitor. VEE may be a negative voltage or it mayequal ground potential. Any or all of the VEE pins may beused. Unused VEE pins must remain open.V– (Pin 2): Output Stage Negative Supply. V– may equalVEE or may be smaller in magnitude. Only output stagecurrent flows out of V–, all other current flows out of VEE.V– may be used to drive the base/gate of an external powerdevice to boost the amplifier’s output current to levelsabove the rated 500mA of the on-chip output devices.Unless used to drive boost transistors, V– should bedecoupled to ground with a low ESR capacitor.OUT (Pin 3): Amplifier Output. The OUT pin provides theforce function as part of a Kelvin sensed load connection.OUT is normally connected directly to an external loadcurrent sense resistor and the SENSE+ pin. Amplifierfeedback is directly connected to the load and the otherend of the current sense resistor. The load connection isalso wired directly to the SENSE– pin to monitor the loadcurrent.The OUT pin is current limited to ±800mA typical. Thiscurrent limit protects the output transistor in the eventthat connections to the external sense resistor are openedor shorted which disables the precision current limitfunction.SENSE+ (Pin 4): Positive Current Sense Pin. This lead isnormally connected to the driven end of the external senseresistor. Sourcing current limit operation is activatedwhen the voltage VSENSE (VSENSE+ – VSENSE–) equals 1/10 of the programming control voltage at VCSRC (Pin 13).Sinking current limit operation is activated when thevoltage VSENSE equals –1/10 of the programming controlvoltage at VCSNK (Pin 12).FILTER (Pin 5): Current Sense Filter Pin. This pin isnormally not used and should be left open or shorted to theSENSE– pin. The FILTER pin can be used to adapt theresponse time of the current sense amplifiers with a 1nFto 100nF capacitor connected to the SENSE– input. Aninternal 1k resistor sets the filter time constant.SENSE– (Pin 6): Negative Current Sense Pin. This pin isnormally connected to the load end of the external senseresistor. Sourcing current limit operation is activatedwhen the voltage VSENSE (VSENSE+ – VSENSE–) equals 1/10 of the programming control voltage at VCSRC (Pin 13).Sinking current limit operation is activated when thevoltage VSENSE equals –1/10 of the programming controlvoltage at VCSNK (Pin 12).VCC (Pin 7): Positive Supply Voltage. All circuitry exceptthe output transistors draw power from VCC. Total supplyvoltage from VCC to VEE must be between 3.5V and 36V.VCC must always be greater than or equal to V+. VCC shouldalways be decoupled to ground with a low ESR capacitor.–IN (Pin 8): Inverting Input of Amplifier. –IN may be anyvoltage from VEE – 0.3V to VEE + 36V. –IN and +IN remainhigh impedance at all times to prevent current flow into theinputs when current limit mode is active. Care must betaken to insure that –IN or +IN can never go to a voltagebelow VEE – 0.3V even during transient conditions ordamage to the circuit may result. A Schottky diode fromVEE to –IN can provide clamping if other elements in thecircuit can allow –IN to go below VEE.+IN (Pin 9): Noninverting Input of Amplifier. +IN may beany voltage from VEE – 0.3V to VEE + 36V. –IN and +INremain high impedance at all times to prevent current flowinto the inputs when current limit mode is active. Caremust be taken to insure that –IN or +IN can never go to avoltage below VEE – 0.3V even during transient conditionsor damage to the circuit may result. A Schottky diode fromVEE to +IN can provide clamping if other elements in thecircuit can allow +IN to go below VEE.8
UUU1970fb
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LT1970
PI FU CTIO SVCSNK (Pin 12): Sink Current Limit Control Voltage Input.The current sink limit amplifier will activate when thesense voltage between SENSE+ and SENSE– equals–1.0 • VVCSNK/10. VCSNK may be set between VCOMMONand VCOMMON + 6V. The transfer function between VCSNKand VSENSE is linear except for very small input voltages atVCSNK < 60mV. VSENSE limits at a minimum set point of4mV typical to insure that the sink and source limitamplifiers do not try to operate simultaneously. To forcezero output current, the ENABLE pin can be taken low.VCSRC (Pin 13): Source Current Limit Control VoltageInput. The current source limit amplifier will activatewhen the sense voltage between SENSE+ and SENSE–equals VVCSRC/10. VCSRC may be set between VCOMMONand VCOMMON + 6V. The transfer function between VCSRCand VSENSE is linear except for very small input voltagesat VCSRC < 60mV. VSENSE limits at a minimum set pointof 4mV typical to insure that the sink and source limitamplifiers do not try to operate simultaneously. To forcezero output current, the ENABLE pin can be taken low.COMMON (Pin 14): Control and ENABLE inputs and flagoutputs are referenced to the COMMON pin. COMMONmay be at any potential between VEE and VCC – 3V. Intypical applications, COMMON is connected to ground.ENABLE (Pin 15): ENABLE Digital Input Control. Whentaken low this TTL-level digital input turns off the amplifieroutput and drops supply current to less than 1mA. Use theENABLE pin to force zero output current. Setting VCSNK =VCSRC = 0V allows IOUT = ±4mV/RSENSE to flow in or outof VOUT.ISRC (Pin 16): Sourcing Current Limit Digital Output Flag.ISRC is an open collector digital output. ISRC pulls lowwhenever the sourcing current limit amplifier assumescontrol of the output. This pin can sink up to 10mA ofcurrent. The current limit flag is off when the sourcecurrent limit is not active. ISRC, ISNK and TSD may bewired “OR” together if desired. ISRC may be left open ifthis function is not monitored.ISNK (Pin 17): Sinking Current Limit Digital Output Flag.ISNK is an open collector digital output. ISNK pulls lowwhenever the sinking current limit amplifier assumescontrol of the output. This pin can sink up to 10mA ofcurrent. The current limit flag is off when the sourcecurrent limit is not active. ISRC, ISNK and TSD may bewired “OR” together if desired. ISNK may be left open ifthis function is not monitored.TSD (Pin 18): Thermal Shutdown Digital Output Flag. TSDis an open collector digital output. TSD pulls low wheneverthe internal thermal shutdown circuit activates, typically ata die temperature of 160°C. This pin can sink up to 10mAof output current. The TSD flag is off when the dietemperature is within normal operating temperatures.ISRC, ISNK and TSD may be wired “OR” together ifdesired. ISNK may be left open if this function is notmonitored. Thermal shutdown activation should promptthe user to evaluate electrical loading or thermal environ-mental conditions.V+ (Pin 19): Output Stage Positive Supply. V+ may equalVCC or may be smaller in magnitude. Only output stagecurrent flows through V+, all other current flows into VCC.V+ may be used to drive the base/gate of an external powerdevice to boost the amplifier’s output current to levelsabove the rated 500mA of the on-chip output devices.Unless used to drive boost transistors, V+ should bedecoupled to ground with a low ESR capacitor.Package Base: The exposed backside of the package iselectrically connected to the VEE pins on the IC die. Thepackage base should be soldered to a heat spreading padon the PC board that is electrically connected to VEE.UUU1970fb
9
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LT1970
BLOCK DIAGRA A D TEST CIRCUIT RFB1kVCCV++IN71915V9+–RG1kVIN810k1710k1610k–INISNKD1ISINK155V1213ENABLEVCSNKVCSRCENABLED2VCSRCISRC14COMMONAPPLICATIO S I FOR ATIOThe LT1970 power op amp with precision controllablecurrent limit is a flexible voltage and current sourcemodule. The drawing on the front page of this data sheetis representative of the basic application of the circuit,however many alternate uses are possible with properunderstanding of the subcircuit capabilities.CIRCUIT DESCRIPTIONMain Operational AmplifierSubcircuit block GM1, the 1X unity-gain current bufferand output transistors Q1 and Q2 form a standard opera-tional amplifier. This amplifier has ±500mA current outputcapability and a 3.6MHz gain bandwidth product. Mostapplications of the LT1970 will use this op amp in the mainsignal path. All conventional op amp circuit configurationsare supported. Inverting, noninverting, filter, summationor nonlinear circuits may be implemented in a conven-tional manner. The output stage includes current limitingat ±800mA to protect against fault conditions. The inputstage has high differential breakdown of 36V minimumbetween –IN and +IN. No current will flow at the inputswhen differential input voltage is present. This feature isimportant when the precision current sense amplifiers“ISINK” and “ISRC” become active.Current Limit AmplifiersAmplifier stages “ISINK” and “ISRC” are very high transcon-ductance amplifier stages with independently controlled off-set voltages. These amplifiers monitor the voltage betweeninput pins SENSE+ and SENSE– which usually sense thevoltage across a small external current sense resistor. Thetransconductance amplifiers outputs connect to the samehigh impedance node as the main input stage GM1 ampli-fier. Small voltage differences between SENSE+ and SENSE–, smaller than the user set VCSNK/10 and VCSRC/10 in mag-nitude, cause the current limit amplifiers to decouple fromthe signal path. This is functionally indicated by diodes D1and D2 in the Block Diagram. When the voltage VSENSEincreases in magnitude sufficient to equal or overcome oneof the offset voltages VCSNK/10 or VCSRC/10, the appropri-ate current limit amplifier becomes active and because of1970fb10
–VCSNK+15V18TSD–ISRC+UWUW+–Q1GM11×Q2OUT3+–+–VSNKSENSE+RCS1Ω456RLOAD1kVSRCRFIL1kFILTERSENSE–V–2VEE2, 10, 11, 20–15V1970TCUU元器件交易网www.cecb2b.com
LT1970APPLICATIO S I FOR ATIOits very high transconductance, takes control from the inputstage, GM1. The output current is regulated to a value ofIOUT = VSENSE/RSENSE = (VCSRC or VCSNK)/(10 • RSENSE).The time required for the current limit amplifiers to takecontrol of the output is typically 4µs.Linear operation of the current limit sense amplifier oc-curs with the inputs SENSE+ and SENSE– ranging be-tween VCC – 1.5V and VEE + 1.5V. Most applications willconnect pins SENSE+ and OUT together, with the load onthe opposite side of the external sense resistor and pinSENSE–. Feedback to the inverting input of GM1 should beconnected from SENSE– to –IN. Ground side sensing ofload current may be employed by connecting the loadbetween pins OUT and SENSE+. Pin SENSE– would beconnected to ground in this instance. Load current wouldbe regulated in exactly the same way as the conventionalconnection. However, voltage mode accuracy would bedegraded in this case due to the voltage across RSENSE.Creative applications are possible where pins SENSE+ andSENSE– monitor a parameter other than load current. Theoperating principle that at most one of the current limitstages may be active at one time, and that when active, thecurrent limit stages take control of the output from GM1,can be used for many different signals.Current Limit Threshold Control BuffersInput pins VCSNK and VCSRC are used to set the responsethresholds of current limit amplifiers “ISINK” and “ISRC”.Each of these inputs may be independently driven by avoltage of 0V to 5V above the COMMON reference pin. The0V to 5V input voltage is attenuated by a factor of 10 andapplied as an offset to the appropriate current limit ampli-fier. AC signals may be applied to these pins. The ACbandwidth from a VC pin to the output is typically 2MHz.For proper operation of the LT1970, these control inputscannot be left floating.For low VCC supply applications it is important to keep themaximum input control voltages, VCSRC and VCSNK, atleast 2.5V below the VCC potential. This ensures linearcontrol of the current limit threshold. Reducing the currentlimit sense resistor value allows high output current froma smaller control voltage which may be necessary if theVCC supply is only 5V.UThe transfer function from VC to the associated VOS islinear from about 0.1V to 5V in, or 10mV to 500mV at thecurrent limit amplifier inputs. An intentional nonlinearityis built into the transfer functions at low levels. This non-linearity insures that both the sink and source limit ampli-fiers cannot become active simultaneously. Simultaneousactivation of the limit amplifiers could result in uncon-trolled outputs. As shown in the Typical PerformanceCharacteristics curves, the control inputs have a “hockeystick” shape, to keep the minimum limit threshold at 4mVfor each limit amplifier.Figure 1 illustrates an interesting use of the current senseinput pins. Here the current limit control amplifiers areused to produce a symmetrically limited output voltageswing. Instead of monitoring the output current, theoutput voltage is divided down by a factor of 20 andapplied to the SENSE+ input, with the SENSE– inputgrounded. When the threshold voltage between SENSE+and SENSE– (VCLAMP/10) is reached, the current limitstage takes control of the output and clamps it a level of ±2• VCLAMP. With control inputs VCSRC and VCSNK tiedtogether, a single polarity input voltage sets the same +and – output limit voltage for symmetrical limiting. In thiscircuit the output will current limit at the built-in fail-safelevel of typically 800mA.12VVCLAMPOV TO 5VVCSRCVCSNK EN+INVCCR33k80mVTO10V–80mVTO±CLAMP–10VREACHEDOUTPUT CLAMPSAT 2× VCLAMPVINV+LT1970–INCOMMONVEETSDOUTSENSE+SENSE–FILTERV–ISRCISNKR121.5kR21.13kRLRG–12VRF1970 F01WUUFigure 1. Symmetrical Output Voltage Limiting1970fb11
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LT1970
APPLICATIO S I FOR ATIOENABLE ControlThe ENABLE input pin puts the LT1970 into a low supplycurrent, high impedance output state. The ENABLE pinresponds to TTL threshold levels with respect to theCOMMON pin. Pulling the ENABLE pin low is the best wayto force zero current at the output. Setting VCSNK = VCSRC= 0V allows the output current to remain as high as±4mV/RSENSE.In applications such as circuit testers (ATE), it may bepreferable to apply a predetermined test voltage with apreset current limit to a test node simultaneously. TheENABLE pin can be used to provide this gating action asshown in Figure 2. While the LT1970 is disabled, the loadis essentially floating and the input voltage and currentlimit control voltages can be set to produce the load testlevels. Enabling the LT1970 then drives the load. TheLT1970 enables and disables in just a few microseconds.The actual enable and disable times at the load are afunction of the load reactance.Operating Status FlagsThe LT1970 has three digital output indicators; TSD, ISRCand ISNK. These outputs are open collector drivers re-ferred to the COMMON pin. The outputs have 36V capabili-ties and can sink in excess of 10mA. ISRC and ISNK5V0VENABLEDISABLE5V12VVCSRCVCSNK EN+INVCCVINLT1970–INCOMMONVEERG10kFigure 2. Using the ENABLE pin1970fb12
Uindicate activation of the associated current limit ampli-fier. The TSD output indicates excessive die temperaturehas caused the circuit to enter thermal shutdown. Thethree digital outputs may be wire “OR’d” together, moni-tored individually or left open. These outputs do not affectcircuit operation, but provide an indication of the presentoperational status of the chip.For slow varying output signals, the assertion of a low levelat the current limit output flags occurs when the currentlimit threshold is reached. For fast moving signals wherethe LT1970 output is moving at the slew limit, typically1.6V/µs, the flag assertion can be somewhat premature attypically 75% of the actual current limit value.The operating status flags are designed to drive LEDs toprovide a visual indication of current limit and thermalconditions. As such, the transition edges to and from theactive low state are not particularly sharp and may exhibitsome uncertainty. Adding some positive feedback to thecurrent limit control inputs helps to sharpen thesetransitions.With the values shown in Figure 3, the current limitthreshold is reduced by approximately 0.5% when eithercurrent limit status flag goes low. With sharp logic transi-tions, the status outputs can be used in a system controlVOUT1V/DIV0VEN10V/DIV0VVIN = 0.5VV+ISRCISNK5µs/DIVRS1ΩRL10ΩVIN = –0.5VTSDOUTSENSE+SENSE–FILTERV––12VRF10k1970 F02WUU元器件交易网www.cecb2b.com
LT1970APPLICATIO S I FOR ATIOloop to take protective measures when a current limitcondition is detected automatically.The current limit status flag can also be used to producea dramatic change in the current limit value of the ampli-fier. Figure 4 illustrates a “snap-back” current limitingcharacteristic. In this circuit, a simple resistor networkCURRENTLIMITCONTROLVOLTAGE(0.1V TO 5V)R1100ΩR2100ΩR320kISOURCE FLAGR420kISINK FLAG12VVCSRCVCSNK EN+INVCCWHEN CURRENT LIMITIS FLAGGED, ILIMITTRESHOLD IS REDUCEDBY 0.5%RS1ΩVINLT1970–INCOMMONVEETSDOUTSENSE+SENSE–FILTERV–V+ISRCISNKRG–12VRF1970 F03Figure 3. Adding Positive Feedback to Sharpen the TransitionEdges of the Current Limit Status Flags12VR239.2kR154.9kR32.55kVINVCSRCVCSNK EN+INVCCLT1970–INCOMMONVEETSDOUTSENSE+SENSE–FILTERV–V+ISRCISNKRG10k–12VRF10k1970 F04Figure 4. “Snap-Back” Current Limiting1970fbUinitially sets a high value of current limit (500mA). Thecircuit operates normally until the signal is large enough toenter current limit. When either current limit flag goes low,the current limit control voltage is reduced by a factor of10. This then forces a low level of output current (50mA)until the signal is reduced in magnitude. When the loadcurrent drops below the lower level, the current limit isthen restored to the higher value. This action is similar toa self resettable fuse that trips at dangerously high currentlevels and resets only when conditions are safe to do so.THERMAL MANAGEMENTMinimizing Power DissipationThe LT1970 can operate with up to 36V total supplyvoltage with output currents up to ±500mA. The amountof power dissipated in the chip could approach 18W underworst-case conditions. This amount of power will causedie temperature to rise until the circuit enters thermalshutdown. While the thermal shutdown feature preventsdamage to the circuit, normal operation is impaired.Thermal design of the LT1970 operating environment isessential to getting maximum utility from the circuit.The first concern for thermal management is minimizingthe heat which must be dissipated. The separate powerpins V+ and V– can be a great aid in minimizing on-chippower. The output pin can swing to within 1.0V of V+ or V–even under maximum output current conditions. Usingseparate power supplies, or voltage regulators, to set V+RLWUU500mARS1Ω50mA0IMAXILOWIOUTRL–500mAVCC • R2(R1 + R2) • 10 • RSVCC • (R2||R3)[R1 + (R2||R3)] • 10 • RSIMAX ≈ILOW ≈13
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LT1970
APPLICATIO S I FOR ATIOand V– to their minimum values for the required outputswing will minimize power dissipation. The supplies VCCand VEE may also be reduced to a minimal value, but thesesupply pins do not carry high currents, and the powersaving is much less. VCC and VEE must be greater than themaximum output swing by 1.5V or more.When V– and V+ are provided separately from VCC and VEE,care must be taken to insure that V– and V+ are always lessthan or equal to the main supplies in magnitude. Protec-tion Schottky diodes may be required to insure this in allcases, including power on/off transients.Operation with reduced V+ and V– supplies does not affectany performance parameters except maximum outputswing. All DC accuracy and AC performance specificationsguaranteed with VCC = V+ and VEE = V– are still valid withthe reduced output signal swing range.Heat SinkingThe power dissipated in the LT1970 die must have a pathto the environment. With 100°C/W thermal resistance infree air with no heat sink, the package power dissipation islimited to only 1W. The 20-pin TSSOP package withexposed copper underside is an efficient heat conductor ifit is effectively mounted on a PC board. Thermal resis-tances as low as 40°C/W can be obtained by soldering thebottom of the package to a large copper pattern on the PCboard. For operation at 85°C, this allows up to 1.625W ofpower to be dissipated on the LT1970. At 25°C operation,up to 3.125W of power dissipation can be achieved. ThePC board heat spreading copper area must be connectedto VEE.Figure 5 shows examples of PCB metal being used for heatspreading. These are provided as a reference for whatmight be expected when using different combinations ofmetal area on different layers of a PCB. These examples arewith a 4-layer board using 1oz copper on each layer. Themost effective layers for spreading heat are those closestto the LT1970 junction. Soldering the exposed thermalpad of the TSSOP package to the board produces a thermalresistance from junction-to-case of approximately 3°C/W.As a minimum, the area directly beneath the package on allPCB layers can be used for heat spreading. However,limiting the area to that of the metal heat sinking pad is not14
Uvery effective. Expanding the area on various layers sig-nificantly reduces the overall thermal resistance. Theaddition of vias (small 13 mil holes which fill during PCBplating) connecting all layers of metal also helps reducethe operating temperature of the LT1970. These are alsoshown in Figure 5.It is important to note that the metal planes used for heatsinking are connecting electrically to VEE. These planesmust be isolated from any other power planes used in thePCB design.Another effective way to control the power amplifier oper-ating temperature is to use airflow over the board. Airflowcan significantly reduce the total thermal resistance asalso shown in Figure 5.DRIVING REACTIVE LOADSCapacitive LoadsThe LT1970 is much more tolerant of capacitive loadingthan most operational amplifiers. In a worst-case configu-ration as a voltage follower, the circuit is stable for capaci-tive loads less than 2.5nF. Higher gain configurationsimprove the CLOAD handling. If very large capacitive loadsare to be driven, a resistive decoupling of the amplifierfrom the capacitive load is effective in maintaining stabilityand reducing peaking. The current sense resistor, usuallyconnected between the output pin and the load can serveas a part of the decoupling resistance.Inductive LoadsLoad inductance is usually not a problem at the outputs ofoperational amplifiers, but the LT1970 can be used as ahigh output impedance current source. This conditionmay be the main operating mode, or when the circuitenters a protective current limit mode. Just as load capaci-tance degrades the phase margin of normal op amps, loadinductance causes a peaking in the loop response of thefeedback controlled current source. The inductive loadmay be caused by long lead lengths at the amplifier output.If the amplifier will be driving inductive loads or long leadlengths (greater than 4 inches) a 500pF capacitor from theSENSE– pin to the ground plane will cancel the inductiveload and ensure stability.1970fb
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LT1970APPLICATIO S I FOR ATIOSTILL AIR θJATSSOP100°C/WPACKAGETOP LAYERTSSOP50°C/WTSSOP45°C/WTypical Reduction in θJA withLaminar Airflow Over the Device0–10REDUCTION IN θJA (%)–20–30–40–50–6001002003004005006007008009001000AIRFLOW (LINEAR FEET PER MINUTE, lfpm)1970 F05bFigure 5. Examples of PCB Metal Used for Heat Dissipation. Driver Package Mounted on TopLayer. Heat Sink Pad Soldered to Top Layer Metal. Metal Areas Drawn to Scale of Package SizeU2ND LAYER3RD LAYERBOTTOM LAYER1970 F05aWUU% REDUCTION RELATIVETO θJA IN STILL AIR1970fb15
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LT1970
APPLICATIO S I FOR ATIOFigure 6 shows the LT1970 driving an inductive load witha controlled amount of current. This load is shown as ageneric magnetic transducer, which could be used tocreate and modulate a magnetic field. Driving the currentlimit control inputs directly forces a current through theload that could range up to 2MHz in modulation. Biasingthe input stage to the midpoint of the modulation signalallows symmetrical bidirectional current flow through theload. Clamp diodes are added to protect the LT1970 outputfrom large inductive flyback potentials caused by rapiddi/dt changes.Abrupt Load Short ProtectionAn abrupt short-circuit connection, often referred to asscrewdriver or crowbar short, to ground or other supplypotentials is the worst-case load condition for the LT1970.The current limit sense amplifier normally operates withan input voltage differential equal to the voltage across thesense resistor, which is only 500mV maximum in a typicalapplication. During an abrupt load short to ground, theload end of the sense resistor is immediately connected toground while the amplifier output remains at the normaloutput voltage. This can impose a large differential voltageto the sense amplifier inputs for a brief period. If this deltaV can be greater than ±2V, it is beneficial to add clampsbetween the current limit sense amplifier inputs. Theseclamps ensure a smooth transition from the main ampli-fier control to the current limit amplifier control under allload short conditions that may arise.5VVIN0VVCSRCVCSNK EN+INVCC12V12VR195.3KLT1634-2.52.5V–INCOMMONFigure 6. Current Modulation of a Magnetic Transducer1970fb16
UFigure 7 shows the connection of these back-to-backclamp diodes between the FILTER pin and the SENSE+ pin.With this connection, the internal 1k resistor between theSENSE– pin and the FILTER pin limits the diode current.The BAV99 diodes are small SOT-23 packaged generalpurpose silicon diodes. The maximum current limit sensevoltage is now the diode voltage drop, determined by thevoltage across the sense resistor and the 1k internalresistor. As the diode begins to conduct current, with avoltage drop of around 300mV, an error in the expected–current limit level at the high end of the control becomes+MAINAMPLIFIER3OUTRSENSELOADCURRENTLIMIT SENSEAMPLIFIER3451k6SENSE+FILTERSENSE–121nF TO 10nFSENSE+2N39042N3904FILTERHIGHER CLAMP VOLTAGEALTERNATIVE1970 F07WUUBAV99100Ω**OPTIONAL—SEE TEXTFigure 7. Adding Protection for Abrupt Load ShortsTSDOUTLT1970SENSE+SENSE–FILTERV–VEEV+ISRCISNKD11N4001RS1Ω±500mAMAGNETICTRANSDUCERD21N40011970 F06–12VC1500pF元器件交易网www.cecb2b.com
LT1970APPLICATIO S I FOR ATIOapparent, as VDIODE is less than the voltage across RSENSE.Adding an optional external 100Ω resistor in parallel withthe internal 1k resistor forces the diode voltage closer tothe sensed current limit voltage and reduces the currentlimit error.Alternatively, the base-emitter junctions of back-to-back2N3904 NPN transistors can provide this clamping action.These diodes begin to conduct at a higher voltage levelnearer to 600mV. With a 500mV maximum current limitthreshold very little error will be noticed. Comparisons oftypical current limit error with three ways of addingclamping protection are shown in Figure 8. Scaling thecurrent sense resistor and the current limit control voltagedown so that a 0V to 300mV current limit sense voltagerange also prevents these accuracy errors caused by theabrupt-short clamping diodes.Also shown in Figure 7 is a small filtering capacitor. Thistoo provides an extra measure of control under abruptload shorting conditions. A fast short-circuit makes ap-parent all parasitic interconnect lead inductances betweenthe LT1970 and the load. These distributed parasiticelements can cause significant transient voltage spikes inthe short time after the application or removal of a shortcircuit. These uncontrolled voltage transients could actu-ally couple back to the current limit amplifier and causepolarity reversal from sourcing current limit to sinking orvice versa. This can act as positive feedback and cause the2520BAV99 w 1kΩ1510BAV99 w 100Ω502N3904 w 1kΩ–5–10CURRENT LIMIT ACCURACY (%)50100150200250300350400450500±VCL SENSE (mV)1970 F08Figure 8. Current Limit Accuracy with Different ClampsUcurrent limit amplifier to go to the incorrect current limitdirection and hang up. Adding a small filter capacitorbetween the SENSE– and FILTER pins, 1nF to 10nF is fairlytypical, which charges through the clamp diodes forcesthe correct current limit polarity at the instant of the loadshort. This holds the amplifier in current limit until thecapacitor discharges through the internal 1k resistor,eliminating transient induced behavior and creating asmooth transition into current limit.Supply BypassingThe LT1970 can supply large currents from the powersupplies to a load at frequencies up to 4MHz. Power supplyimpedance must be kept low enough to deliver thesecurrents without causing supply rails to droop. Low ESRcapacitors, such as 0.1µF or 1µF ceramics, located closeto the pins are essential in all applications. When large,high speed transient currents are present additional ca-pacitance may be needed near the chip. Check supply railswith a scope and if signal related ripple is seen on thesupply rail, increase the decoupling capacitor as needed.To ensure proper start-up biasing of the LT1970, it isrecommended that the rate of change of the supply volt-ages at turn-on be limited to be no faster than 6V/µs.Application Circuit IdeasThe digitally controlled analog pin driver is shown inFigure 9. All of the control signals are provided by anLTC®1664 quad, 10-bit DAC by way of a 3-wire serialinterface. The LT1970 is configured as a simple differenceamplifier with a gain of 3. This gain is required to produce±15V from the 0V to 5V outputs from DACs C and D. Toprovide voltage headroom, the supplies for the LT1970 areset to the maximum value of ±18V. As ±18V is the absolutemaximum rating of supply voltage for the LT1970, caremust be taken to not allow the supply voltage to increase.DACs A and B separately control the sinking and sourcingcurrent limit to the load over the range of ±4mA to±500mA. An optional ON/OFF control for the pin driverusing the ENABLE input is shown. If always enabled theENABLE pin should be tied to VCC.1970fbWUU17
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LT1970
APPLICATIO S I FOR ATIOOPTIONAL TEST PINON/OFF CONTROLAPPLY LOADDRIVE5VHi-Z0V5VVOUT = 15VVCCCLRVREFDAC A3-WIRESERIALINTERFACECS/LDSCKDIDECODERDAC BDAC CR210.2kDAC DLTC1664QUAD 10-BIT DACR410.2kFigure 9. Digitally Controlled Analog Pin DriverIn some applications it may be necessary to know what thecurrent into the load is at any time. Figure 10 shows anLT1787 high side current sense amplifier monitoring thecurrent through sense resistor RS. The LT1787 is biasedfrom the VEE supply to accommodate the common modeinput range of ±10V. The sense resistor is scaled down toprovide a 100mV maximum differential signal to thecurrent sense amplifier to preserve linearity. The LT1880amplifier provides gain and level shifting to produce a 0Vto 5V output signal (2.5V DC ±5mV/mA) with up to 1kHzfull-scale bandwidth. An A/D converter could then digitizethis instantaneous current reading to provide digital feed-back from the circuit.The LT1970 is just as easy to use as a standard operationalamplifier. Basic amplification of a precision referencevoltage creates a very simple bench DC power supply asshown in Figure 11. The built-in power stage produces anadjustable 0V to 25V at 4mA to 100mA of output current.Voltage and current adjustments are derived from theLT1634-5 5V reference. The output current capability is500mA, but this supply is restricted to 100mA for powerdissipation reasons. The worst-case output voltage formaximum power dissipated in the LT1970 output stageoccurs if the output is shorted to ground or set to a voltagenear zero. Limiting the output current to 100mA sets themaximum power dissipation to 3W. To allow the output to1970fb18
+UWUU(CODE C – CODE D≈ ±15V1024)ISOURCE(MAX) =0.5 • CODE B≈ –4mA TO –500mA1024 • RSISINK(MAX) =0.5 • CODE A≈ 4mA TO 500mA1024 • RS18VR53kR63k+10µF0.1µFR13.4kVCSRCVCSNK EN+INVCCLT1970R33.4k–INCOMMONVEETSDOUTSENSE+SENSE–FILTERV–V+ISRCISNKRS1ΩFORCETEST PINLOADSENSE10µF–18V0.1µF1970 F09元器件交易网www.cecb2b.com
LT1970APPLICATIO S I FOR ATIOVCC0V TO 1V12VVCSRCVCSNK EN+INVCCLT1970–INCOMMONVEETSDOUTSENSE+SENSE–FILTERV–V+ISRCISNKRGRF–12V–12VFigure 10. Sensing Output Current30V DCR12.1kR2 40kR310kR4 10kOUTPUTVOLTAGEADJUSTCURRENT LIMITADJUSTR55.49kLOADFAULTVCSRCVCSNK EN+INVCCLT1634-5–INCOMMONRG2.55kRF10.2kC1 10µFFigure 11. Simple Bench Power Supply1970fb++URS0.2ΩRLOADLT1787VS–VS+20kVEEBIAS–12VR160.4kR210kR320kR4255k12VWUU–+LT1880VOUT2.5V±5mV/mA1kHz FULL CURRENTBANDWIDTH–12V0V TO 5VA/D1970 F10OPTIONAL DIGITAL FEEDBACKTSDOUTLT1970SENSE+SENSE–FILTERV–VEE–5VV+ISRCISNKRS1Ω+VOUT0V TO 25V4mA TO 100mAC310µFGNDLTC1046C210µF1970 F1119
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LT1970
APPLICATIO S I FOR ATIOrange all the way to 0V, an LTC1046 charge pump inverteris used to develop a –5V supply. This produces a negativerail for the LT1970 which has to sink only the quiescentcurrent of the amplifier, typically 7mA.R513k18VR16.19kR323.2k5VREFVOUTADJUSTR210kLT1634-51/2 LT1881R1210k1/2 LT1881R1325.5k15VR153k–15VTO TSD PINOF +OUTR1410.7kVCSRCVCSNK EN–INVCC–OUTCURRENTLIMITV+ISRCISNKLT1970+INCOMMONVEE1970 F1210µF–15V0.1µFFigure 12. Dual Tracking Bench Power Supply1970fb20
+TSDOUTSENSE+SENSE–FILTERV–RS21ΩC310µF–R410kCURRENTLIMITADJUST++UUsing a second LT1970, a 0V to ±12V dual tracking powersupply is shown in Figure 12. The midpoint of two 10kresistors connected between the + and – outputs is held at0V by the LT1881 dual op amp servo feedback loop. ToR618.2k15VWUU–+R73kR83k0.1+10µFVCSRCVCSNK EN–INVCC+OUTCURRENTLIMITV+ISRCISNKTHERMALFAULT+INCOMMONTSDOUTLT1970SENSE+SENSE–FILTERV–VEERS11Ω+C210µF+OUT0V TO 12V4mA TO 150mA–15VC11µFR910k1%15VR1110kOPTIONAL SYMMETRYADJUST100ΩGROUNDR1010k1%–OUT0V TO –12V4mA TO 150mA元器件交易网www.cecb2b.com
LT1970APPLICATIO S I FOR ATIOmaintain 0V, both outputs must be equal and opposite inpolarity, thus they track each other. If one output reachescurrent limit and drops in voltage, the other output followsto maintain a symmetrical + and – voltage across acommon load. Again, the output current limit is less thanthe full capability of the LT1970 due to thermal reasons.Separate current limit indicators are used on each LT1970because one output only sources current and the otheronly sinks current. Both devices can share the samethermal shutdown indicator, as the output flags can beOR’ed together.Another simple linear power amplifier circuit is shown inFigure 13. This uses the LT1970 as a linear driver of a DCmotor with speed control. The ability to source and sinkthe same amount of output current provides for bidirec-tional rotation of the motor. Speed control is managed bysensing the output of a tachometer built on to the motor.A typical feedback signal of 3V/1000rpm is compared withOV TO 5VTORQUE/STALLCURRENT CONTROLVCSRCVCSNK EN+INVCC–INCOMMON15VR11.2kREVERSER449.9kFORWARDR31.2k–15VR210kFigure 13. Simple Bidirectional DC Motor Speed ControllerUthe desired speed-set input voltage. Because the LT1970is unity-gain stable, it can be configured as an integratorto force whatever voltage across the motor as necessaryto match the feedback speed signal with the set inputsignal.Additionally, the current limit of the amplifier can beadjusted to control the torque and stall current of themotor. For reliability, a feedback scheme similar to thatshown in Figure 4 can be used. Assuming that a stalledrotor will generate a current limit condition, the stallcurrent limit can be significantly reduced to prevent exces-sive power dissipation in the motor windings.For motor speed control without using a tachometer, thecircuit in Figure 14 shows an approach. Using the enablefeature of the LT1970, the drive to the motor can beremoved periodically. With no drive applied, the spinningmotor presents a back EMF voltage proportional to itsrotational speed. The LT1782 is a tiny rail-to-rail amplifier15VLT1970VEETSDOUTSENSE+SENSE–FILTERV–V+ISRCISNKRS1Ω12V DCMOTORGNDC11µF–15VR549.9kTACHFEEDBACK3V/1000rpm1970 F13WUU1970fb21
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LT1970
APPLICATIO S I FOR ATIOOV TO 5VTORQUE/STALLCURRENT CONTROLFWDMOTOR SPEEDCONTROL0VREVR110kR220k5VVCSRCVCSNK+INSTOP–IN ENCOMR1410k12V1/2 LT1638100ΩLT1782C2SHDN0.01µF–12V–12VR710kR820kR1310k12VR1210k1/2 LT1638D1R101N414882.5kD2R111N41489.09k–12VC30.1µFFigure 14. Simple Bidirectional DC Motor Speed Controller Without a Tachometerwith a shutdown pin. The amplifier is enabled during thisinterval to sample the back EMF voltage across the motor.This voltage is then buffered by one-half of an LT1638 dualop amp and used to provide the feedback to the LT1970integrator. When re-enabled the LT1970 will adjust thedrive to the motor until the speed feedback voltage,compared to the speed-set input voltage, settles theoutput to a fixed value. A 0V to 5V signal for the motorspeed input controls both rotational speed and direction.The other half of the LT1638 is used as a simple pulseoscillator to control the periodic sampling of the motorback EMF.22
–+–+U15VR32kFAULT/STALLVCCV+ISRCISNKLT1970TSDOUTSENSE+SENSE–FILTERV–RS1ΩWUU–+12V DCMOTORVEE–15VC14.7µFR4100kR5120k12VR920k1970 F141970fb元器件交易网www.cecb2b.com
LT1970PACKAGE DESCRIPTIO4.95(.195)6.60 ±0.104.50 ±0.10SEE NOTE 4RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50*(.169 – .177)0.09 – 0.20(.0035 – .0079)0.50 – 0.75(.020 – .030)NOTE:1. CONTROLLING DIMENSION: MILLIMETERSMILLIMETERS2. DIMENSIONS ARE IN(INCHES)3. DRAWING NOT TO SCALEInformation furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.UFE Package20-Lead Plastic TSSOP (4.4mm)(Reference LTC DWG # 05-08-1663,Exposed Pad Variation CA) 6.40 – 6.60*(.252 – .260)4.95(.195)201918171615141312112.74(.108)0.45 ±0.051.05 ±0.100.65 BSC123456789101.20(.047)MAX0° – 8°6.402.74(.252)(.108)BSC0.25REF0.65(.0256)BSC0.195 – 0.30(.0077 – .0118)TYP0.05 – 0.15(.002 – .006)FE20 (CA) TSSOP 02044. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006\") PER SIDE1970fb23
元器件交易网www.cecb2b.com
LT1970
APPLICATIO S I FOR ATIOFigure 15 shows how easy it is to boost the output currentof the LT1970. This ±5A power stage uses complementaryexternal N- and P-channel MOSFETs to provide the addi-tional current. The output stage power supply inputs, V+and V–, are used to provide gate drive as needed. Withhigher output currents, the sense resistor RCS, is reducedin value to maintain the same easy current limit control.This Class B power stage is intended for DC and lowfrequency, <1kHz, applications as crossover distortionbecomes evident at higher frequencies.CURRENT LIMITCONTROL VOLTAGE0V TO 5VVCC15VR11kVCCENABLEVCSRC+INVCSNKV+SENSE+SENSE–COMMONV–*LT1970OUTR5100Ω***RCS0.1Ω5W–INVEERG2.2kVINRF2.2kVEE–15V*OPTIONAL, SEE TEXT Figure 15. AV = –1 Amplifier with Discrete Power Devices to Boost Output Current to 5ARELATED PARTSPART NUMBERLT1010LT1206LT1210DESCRIPTIONFast ±150mA Power Buffer250mA/60MHz Current Feedback Amplifier1.1A/35MHz Current Feedback AmplifierCOMMENTS20MHz Bandwidth, 75V/µs Slew RateShutdown Mode, Adjustable Supply CurrentStable with CL = 10,000pF24
Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.comUFigure 15 shows some optional resistor dividers betweenthe output connections and the current sense inputs. Theyare required only if the load of this power stage is removedor at a very low current level. Large power devices with noload on them can saturate and pull the output voltage veryclose to the power supply rails. The current sense ampli-fiers operate properly with input voltages at least 1V awayfrom the VCC and VEE supply rails. In boosted currentapplications, it may be necessary to attenuate the maxi-mum output voltage levels by 1V before connecting to thesense input pins. This only slightly deceases the currentlimit thresholds.R2100ΩIRF953010µF0.1µFR4100ΩLOADIRF530R3100Ω10µF0.1µF1970 F15WUU1970fb LT 0407 REV B • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORATION 2002
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